The present invention relates generally to power profiling in electronic devices and, more particularly, to system level power profiling of embedded applications executing on virtual multi-core system-on-chip (SoC) platforms.
With the proliferation of portable electronic and computing devices in modern society, power consumption has become a major constraint in the design of embedded applications. Of key concern to hardware and software engineers designing such applications is the accurate and efficient gathering of performance and power statistics early on in the design cycle, but with minimal performance overhead and without compromising on accuracy. Existing approaches to gathering such information may generally be classified into two major categories (hardware based and instrumentation based), both of which have their own set of drawbacks.
Hardware based profiling can be very expensive, although it has advantages, such as high frequency profiling and the ability to collect data with little or no impact on normal execution of the target system. However, with hardware based profiling, data may only be obtained from observable points in the system, and thus there is no access to other points of the system. On the other hand, instrumentation based profiling brings in additional overhead on the system. The overhead and effect of measurements on the system being measured must be controlled very carefully, which is often a very difficult task. Without careful control of overhead the power statistics may become skewed as the process of measurement directly alters the system's behavior. Moreover, the additional code added in the embedded application can introduce some spurious transactions, which in turn will affect the accuracy of system level power statistics.